Xilinx Tutorial

CIS 371 (Spring 2013): Computer Organization and Design

The programmable logic boards used for CIS 371 are Xilinx Virtex-II Pro development systems. The centerpiece of the board is a Virtex-II Pro XC2VP30 FPGA (field-progammable gate array), which can be programmed via a USB cable or compact flash card. The board also features PS/2, serial, Ethernet, stereo audio and VGA video ports, user buttons, switches and LEDS, and expansion ports for connecting to other boards.


The Xilinx Virtex-II Pro Development System.


The boards contain exposed components that are sensitive to static electricity. Before touching the boards, try to remember to discharge any static electricity you may have built up by touching a grounded piece of metal (i.e. part of the desk). Especially remember to do this after you have been walking around the room on the carpeted floor (please keep your shoes on).


If you've having problems with the board, you may want to try the - Xilinx Built-In Self Test

I. Preliminaries

Each Klab station contains a Windows machine on the left and a Linux machine on the right. The software for programming the FPGA (Xilinx ISE Project Navigator) is on the Windows machine. Open ISE from Start -> All Programs -> ESE Lab Software -> Xilinx ISE Design Suite 10.1 -> ISE -> Project Navigator


On the Windows machine, your eniac account is mounted on the S: drive. Xilinx tools have to access many files. They get incredibly slow when they have to access those files over Samba. It is recommended that you keep copy of your project in your eniac account, copy the project directory to the local drive (C:user is the only writeable directory, so somewhere under there), use the local copy while in the lab, copy the project back to your eniac account when you are done, and delete the local copy making sure to empty the recycling bin.


Make sure to copy your work back to your eniac account before you leave. The Klab machines are not backed-up and any files that you leave on those machines may be lost.


Make sure to delete the local copy of your project and empty the recycling bin before you leave. Otherwise, other people will be able to see (and copy) your work.


An alternative to using the C:user space is to use a USB Flash drive to hold your files. If you use this approach, please make sure to frequently backup your files to the Eniac S: drive.


Most of this tutorial is built for Windows XP machines. It is to be expected that some of the instructions do not translate perfectly to Windows 7 machines.

II. Creating a new project in ISE

  1. First, ISE may have opened a previously used project. If so, close the project using File -> Close Project.

  2. An ISE project contains all the files needed to design a piece of hardware an d download it to the FPGA. Go to File -> New Project to create a new ISE project. Give the project a location on your mapped Eniac drive and enter a name for the project, such as "tutorial". Set the Top-Level Source Type to HDL and click Next.

  3. The following screen allows you to set the properties for the FPGA you will be downloading your design to. For our boards, the correct settings are Family = "Virtex2P", Device = "XC2VP30", Package = "FF896", and Speed = "-7". Set the Synthesis Tool to "XST (VHDL/Verilog)" and Simulator to "ISE Simulator" and click Next.

  4. On the next screen, click the New Source button. Select Verilog Module from the list and give the module the file name "switch", then click Next. A Verilog module is a self-contained hardware unit with an interface of inputs and outputs, which are specified on the next screen.

  5. This screen takes your inputs and outputs and automatically generates code for your module.


    You can have multiple modules per .v file, and you do not have to use this wizard to add a module.

    Define two ports: "SWITCHES", an input bus with a MSB of 3 and a LSB of 0, and "LEDS", an output bus with a MSB of 3 and a LSB of 0. MSB and LSB stand for most-significant bit and least-significant bit, so these two ports are vectors with four bits/wires.


    Click Next and click Finish on the next screen. This will bring you back to the New Project window; click Next twice and then Finish once to generate your module.

III. Coding your switch module

  1. Once your module is generated, the main ISE Project Navigator view appears. There are four main windows in the Project Navigator: Sources, Processes, Console output, and the editor. The Design Summary tab on the editor window will be selected after you generate your new module; for now, you can close this tab with the X button in the upper-right corner.

  2. Select the switch.v tab in the editor window. If this tab ever gets closed, you can open the file again by double-clicking on it in the Sources window. The switch module will link the four user input switches on the board to the four LEDs next to the switches, so toggling the switches will turn the LEDs on and off. The values of the switches are inputs to the module, and the signals to the LEDs are outputs from the module. To connect the switches to the signals, just add one line of Verilog code to the module:

    assign LEDS[3:0] = SWITCHES[3:0];

    Save your file after entering the code. When saving to a network drive, ISE prompts you for every file you are saving, even if it already exists, so just click Save when the dialog box appears. When you are finished, your module should look like this:

    module switch(
      input [3:0] SWITCHES,
      output [3:0] LEDS
    assign LEDS[3:0] = SWITCHES[3:0];
  3. To "compile" your Verilog code, make sure the switch.v file is highlighted in the Sources window, expand the Synthesize-XST item in the Processes window and double-click Check Syntax.


    The console should not display any errors under the HDL Compilation section, and a CHECK should appear next to Check Syntax. If you get compilation errors, resolve them (ask a TA for help if necessary) before continuing.

IV. Assigning ports to pins

  1. For the ports in the module (SWITCHES and LEDS) to control the components on the board, they must be connected to pins on the FPGA. To do this, click on switch.v in the Sources window, expand the User Constraints item in Processes and double-click on Floorplan IO - Pre-Synthesis. Click OK, then when prompted to add a UCF file to your project, click Yes.

  2. Xilinx PACE will open up. On the left, the ports of your module will be listed, and on the right is a diagram of the FPGA. Click the Package View tab at the bottom of this window to see a diagram of the unconnected pins on the FPGA.

  3. Each component on the board is connected to a pin on the FPGA. Connect the pins to your module's ports by clicking in the Loc box next to each port and typing in the proper pin, as shown in the image below. You should see each pin location fill in with blue on the pin diagram to the right. The other information (I/O Std., Drive Str., etc.) does not have to be filled in. Your list of ports should look like this when you are done.

  4. When you are done entering the pin information, click Save. You may be prompted to choose a Bus Delimiter; choose the top option, XST Default: < >, and click OK. You can then close PACE.

  5. Go back to the ISE Project Navigator. In the Sources window, hit F5 to refresh, then expand the hierarchy for the switch module to see the new file, switch.ucf, that has been added to the project. By double-clicking on Edit Constraints (Text) in the Processes window, you can see the format of the UCF file. If you made a mistake in your pin locations or want to change them in the future, you can directly edit the UCF file instead of using PACE.

V. Generating a programming file

  1. Click on switch.v in the Sources window. In the Processes window, scroll down and double-click on Generate Programming File. This will run all of the processes necessary to create a file that can be downloaded onto the board to program the FPGA. Running these processes may take several minutes; progress is indicated by the spinning SPINNER icon and output to the console.

    When a process completes, a CHECK appears next to it. If any errors occurred during the process, a X will appear next to it. All errors must be resolved before a programming file can be generated. Errors are output to the console, and can be more easily seen by clicking on the Errors tab. Warnings cause a EXCLAMATION to appear next to the process and can be seen under the Warnings tab.


    Warnings are usually a sign that something more serious is wrong. It is strongly suggested that you do not ignore warnings and resolve them before generating a programming file.


    If you receive a warning "WARNING:ProjectMgmt - ... line 0 duplicate design unit: 'Module|switch'", it can safely be ignored. Also, note that after resolving warnings, a successfully run process may still show a EXCLAMATION next to it, due to a bug in ISE.

  2. All processes have run successfully when a CHECK appears next to Generate Programming File. You can scroll up in the Processes window and double-click on View Design Summary to see a report of your design and links to more detailed reports.


    A successful programming file generation.

VI. Programming the FPGA with iMPACT

  1. Plug one end of the power cable into a socket and the other end into your board in the upper-left corner. Plug one end of the USB cable into a port on your computer and plug the other end into the connector on the right side of your board. Set the config source switch (switch 1 on component SW9, next to the PS/2 ports) to JTAG (down/off); the settings for the other configuration switches do not matter. Turn on the power switch, located next to the power cable connection, and the green JTAG configuration LED (D20) should turn on. You may also see a blinking red LED next to the word "error". At this point, run out of the room. The FPGA will self-destruct in 5 seconds. Seriously, try to ignore this LED. It only means that there is no card in the flash reader. If the board has not been connected to the USB port before, the Found New Hardware Wizard will appear. On the first screen, when asked to connect to Windows Update, select No and click Next. On the second screen, choose to install the software automatically and click Next. Windows will find and install a driver; click Finish on the next screen. You will have to repeat these steps two more times, until Windows installs all of the required software. Installation is finished when you see the following prompt.


    If your board has previously been connected to the USB port, or whenever you restart/reset your board, a window should pop up notifying you that Windows recognizes the attached device.


    You should see this notification window when you turn on/reset your board.

  2. From the Windows Start Menu, go to ESE Lab Software > Xilinx ... > ISE > iMPACT 64-bit. iMPACT should open and present the iMPACT Project window. Select create a new project, the default is fine and click ok. Make sure the first choice (Boundary-Scan) is selected and "Automatically connect..." appears in the drop-down box, and click Finish. If iMPACT successfully finds your board, 3 devices will appear in the upper half of the iMPACT window and a dialog box will appear:


    If iMPACT fails to find your board, you will see this dialog:


    If this happens, click OK, then try again to get Windows to recognize your board by unplugging the USB cable from your board, plugging it back in, then holding down the board's reset button (located on the right side of the board, next to the PS/2 ports) for two seconds. If you cannot get Windows to connect to the board, see a TA. Once you have a connection, click on the Initialize Chain (CHAIN) button on iMPACT's toolbar to scan for your board again.

  3. When iMPACT successfully scans your board, it finds three programmable devices. The first, "xcf32p", is the board's non-volatile PROM. The second, "xccace", is the System ACE controller (for compact flash). The third, "xc2vp30", is the actual FPGA. In general, you should only need to program the third device, the FPGA.


    You should now see the "Assign New Configuration File" dialog box (if you do not, see the note below). Do not assign configuration files to the first two devices; skip over them by clicking Bypass or Cancel twice. The third device, the FPGA, is programmed with a .bit file. iMPACT should automatically show your project directory and a file, switch.bit. Select this file and click Open, then click OK on the next dialog box to assign the configuration file to the FPGA. Ignore any "clock change" warnings that you may receive.


    Sometimes, iMPACT may not prompt you to assign configuration files to the three devices. If it does not, you can do it yourself by right-clicking on the FPGA (xc2vp30) and choosing Assign New Configuration File.

  4. In the iMPACT main window, right-click on the FPGA (xc2vp30) and select Program. Leave all of the boxes unchecked and click OK. The Executing Command box should appear, followed by a blue "Program Succeeded" message. The red "Done" LED on the board (D4) should light up, indicating that the FPGA has been programmed. Toggle the user switches, and the corresponding user LEDs should turn on and off. Close iMPACT and choose No when prompted to save your changes.

    If your design does not work as expected, close iMPACT, go back to the ISE Project Navigator and make changes. Reset the board by holding down the reset button (you do not have to turn the power off), then generate the programming file again. Double-click on Configure Device (iMPACT) and program the board again.


    It is recommended that you follow this order of turning on/resetting the board before starting iMPACT, and it is also recommended that you close iMPACT and restart it before reprogramming your board. Other ways may work, but may sometimes produce unusual behavior. If you see any strange errors in iMPACT, close it, reset your board/connection and try again.


    Note on iMPACT 64-bit: Every time iMPACT is closed without saving, a Windows error pops up complaining that impacthost.exe stopped working. We are not sure why it does this, but it doesn't seem to cause other problems.

Helpful hints


The user switches are "active-low", meaning they send a 0 to the FPGA when they are on/up and a 1 when they are off/down. The user LEDs act similarly: they are lit when sent a 0 and off when sent a 1. If you want to experiment and modify your design, keep this in mind. In future assignments, you may be given a controller in which the behavior is reversed to be more intuitive.


Save your work often. You can also use the "snapshots" feature of ISE to make a backup of your project at any time. In the ISE Project Navigator, go to Project -> Take Snapshot, give it a name and a comment (i.e. the date/time) and ISE will save a snapshot to a subdirectory of your project folder. Snapshots can be managed by clicking the Snapshots tab in the Sources window.


The following links contain useful documentation and online help:

Authors: Peter Hornyack, Milo Martin

Updaters: Amir Roth, Mishal Awadah