CIS 371 (Spring 2012): Digital Systems Organization and Design

Tentative Course Schedule

This schedule is tentative. The assignment due dates are also approximate, and may be adjusted to be a class period earlier or later depending on if we're ahead or behind with the course material.

Course Schedule

Date Textbook Lecture Topic Assignment due
Thur, Jan 12 1.1-1.9 Introduction  
     
Tues, Jan 17 2.1-2.7 Introduction (continued)  
Thur, Jan 19 2.16-2.19 ISAs  
     
Tues, Jan 24   ISAs (continued)  
Thur, Jan 26 Appendix C Digital Logic & Verilog  
     
Tues, Jan 31   Digital Logic & Verilog (continued) Homework 1
Thur, Feb 2 3.1-3.9 (skim 3.5) Arithmetic  
     
Tues, Feb 7 4.1-4.4 Single-Cycle Datapath  
Thur, Feb 9   Single-Cycle Datapath Lab 0
     
Tues, Feb 14 4.5-4.8 Pipelining  
Thur, Feb 16   Pipelining (continued)  
     
Tues, Feb 21 1.4, 1.7-1.9 Lab Hints & Performance  
Thur, Feb 23 5.1-5.3 Caches (& last part of Pipelining) Lab 1
     
Tues, Feb 28   Caches (guest lecture) Homework 2
Thur, Mar 1   Caches (continued) Lab 2
     
Tues, Mar 6   No Class -- Spring Break  
Thur, Mar 8   No Class -- Spring Break  
     
Tues, Mar 13   Caches (continued) & Review  
Thur, Mar 15   Midterm exam Midterm exam
     
Tues, Mar 20 5.4 Virtual Memory  
Thur, Mar 22   Virtual Memory (continued)  
     
Tues, Mar 27 4.10 Superscalar  
Thur, Mar 29 4.11 Static & Dynamic Scheduling  
     
Tues, Apr 3   Static & Dynamic Scheduling (continued)  
Thur, Apr 5 7.1-7.3, 7.5 Multicore Lab 3a (pipeline) - design document
     
Tues, Apr 10 5.8, 5.10 Multicore (continued)  
Thur, Apr 12   Multicore (continued) Lab 3b.1 (pipeline) - preliminary demo I
     
Tues, Apr 17 7.6 Vectors  
Thur, Apr 19 7.7 GPUs (guest lecture) Lab 3b.2 (pipeline) - preliminary demo II
     
Tues, Apr 24 1.5 Power & XBox360 Lab 4c (pipeline) - final demo