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<h2>CIS 471/571: Computer Organization and Design <small>Spring 2022</small></h2>
### Course Information
**instructor**: [Joe Devietti](http://www.cis.upenn.edu/~devietti/)
**when**: MW 3:30-5pm
**where**: [Stiteler B6](https://www.facilities.upenn.edu/maps/locations/stiteler-hall)
**contact**: [canvas](https://canvas.upenn.edu/courses/1627055) (which has links to Gradescope and Ed Discussions)
**TAs**:
+ Neehal Hussain
+ Elijah Magerman
+ Amelia Rosenbaum
+ Lindsay Smith
+ Matthew Tang
+ Zhiyao Tang
+ Alexandra Tanner
**office hours**
See the Pinned post on Ed Discussions for OH details.
### Course Description
This is a second computer organization course and focuses on computer hardware
design. In this course you will design and implement a pipelined, superscalar
processor for a simple RISC ISA using Verilog. You will learn the range of
architectural techniques used in modern CPU design including superscalar design,
out-of-order execution, and cache hierarchies.
### Frequently Asked Questions
* What happened to CIS 371 and CIS 501?
CIS 471/571 was called CIS 371/501 in previous semesters. It has been renumbered
to fit the standard university numbering scheme for cross-listed undergrad/grad
courses. There is no substantive change to the content from previous years.
* What's the difference between CIS 471 and CIS 571?
There is **no** difference in the course content (assignments, exams, etc.)
between CIS 471 and 571. If you are a graduate student, however, you'll need to take CIS
571.
* Do all group partners need to be in the **same** course number?
No, one member can be in CIS 471 while the other is in CIS 571.
### Prerequisites
CIS 240 and knowledge of at least one software programming language. We do not
assume you have any prior experience with Verilog.
### Course Materials
The main textbook is *Computer Organization and Design: The Hardware/Software
Interface* by Patterson and Hennessy. The 4th and 5th Editions are both
fine. The 4th Edition is available [for free on-line through the Penn
Library](http://hdl.library.upenn.edu/1017.12/876659).
*Introduction to Logic Synthesis using Verilog HDL* by Reese and Thornton is
also a nice introduction to hardware design and Verilog. It is also available
[as a free PDF via the Penn
Library](http://www.morganclaypool.com/doi/abs/10.2200/S00060ED1V01Y200610DCS006).
I like [*Digital Design: A Systems
Approach*](https://www.cambridge.org/us/academic/subjects/engineering/circuits-and-systems/digital-design-systems-approach?format=HB&isbn=9780521199506)
by Dally and Harting. I'm not aware of a free version, and it's not a required
text, but I do think it gives a nice explanation of many of the topics we'll
cover in class.
The [LC4 ISA sheet](lc4.html) will also be a common reference.
### Course Policies
See details about [course policies on late days, collaboration, etc.](policies.html)
### Lecture slides
Lecture recordings are available via Canvas under **Class Recordings**.
Lecture slides:
+ Introduction ([pptx](slides/01_intro.pptx), [pdf](slides/01_intro.pdf))
+ Verilog ([pptx](slides/02_verilog.pptx), [pdf](slides/02_verilog.pdf))
+ Arithmetic ([pptx](slides/03_arith.pptx), [pdf](slides/03_arith.pdf))
+ Single-Cycle Datapath ([pptx](slides/04_singlecycle.pptx), [pdf](slides/04_singlecycle.pdf))
+ Performance ([pptx](slides/05_performance.pptx), [pdf](slides/05_performance.pdf))
+ Pipelined Datapath ([pptx](slides/06_pipeline.pptx), [pdf](slides/06_pipeline.pdf))
+ Branch Prediction ([pptx](slides/07_branchprediction.pptx), [pdf](slides/07_branchprediction.pdf))
+ Debugging ([pptx](slides/08_debugging.pptx), [pdf](slides/08_debugging.pdf))
+ Caches ([pptx](slides/08_caches.pptx), [pdf](slides/08_caches.pdf))
+ Memory ([pptx](slides/09_virtual_memory.pptx), [pdf](slides/09_virtual_memory.pdf))
+ Superscalar ([pptx](slides/10_superscalar.pptx), [pdf](slides/10_superscalar.pdf))
+ Out-of-Order ([pptx](slides/11_ooo.pptx), [pdf](slides/11_ooo.pdf))
+ Meltdown/Spectre ([pptx](slides/12_meltdown_spectre.pptx), [pdf](slides/12_meltdown_spectre.pdf))
+ Multicore ([pptx](slides/13_multicore.pptx), [pdf](slides/13_multicore.pdf))
+ Accelerators ([pptx](slides/14_accelerators.pptx), [pdf](slides/14_accelerators.pdf))
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### Course Schedule
The course schedule is maintained on our Canvas site.
### Previous Editions of CIS 501 and CIS 371
- [CIS 471/571, Spring 2021](http://cis.upenn.edu/~cis571/spring2021)
- [CIS 371, Spring 2020](http://cis.upenn.edu/~cis371/previous/spring2020)
- [CIS 501, Fall 2019](http://cis.upenn.edu/~cis501/previous/fall2019)
- [CIS 501, Spring 2019](http://cis.upenn.edu/~cis501/previous/spring2019)
- [CIS 371, Spring 2018](http://www.cis.upenn.edu/~cis371/18sp/)
- [CIS 371, Spring 2017](http://www.cis.upenn.edu/~cis371/17sp/)
- [CIS 371, Spring 2016](http://www.cis.upenn.edu/~cis371/16sp/)
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