[![Kaveri die photo, c/o Anandtech](images/kaveri-die-shot.png "Kaveri die photo, c/o Anandtech")](http://www.anandtech.com/show/7677/amd-kaveri-review-a8-7600-a10-7850k/4) <h2>CIS 501: Computer Architecture <small>Fall 2015</small></h2> ### Course Information **instructor**: [Joe Devietti](http://www.cis.upenn.edu/~devietti/) **when**: Tuesday/Thursday 3:00-4:30pm **where**: [DRL](http://www.facilities.upenn.edu/maps/locations/david-rittenhouse-laboratory) A8 **contact**: [**piazza**](https://piazza.com/upenn/fall2015/srs_cis5010012015c/home), [**email**](mailto:cis501@cis), [**canvas**](https://canvas.upenn.edu/courses/1295183) **TAs**: Jitesh Gupta, Yuanfeng Peng and Nick Roessler **office hours**: + Joe, Mondays 11-noon in Levine 572 + Jitesh, Mondays 2-3pm in bump space outside Levine 560 + Yuanfeng, Wednesdays 2:30-3:30pm in Levine 614 + Nick, Fridays 2-3pm in the bump space outside Levine 360 ### Course Description This course is a graduate course on computer architecture with an emphasis on a quantitative approach to cost/performance design tradeoffs. The course covers the fundamentals of classical and modern processor design: performance and cost issues, instruction sets, pipelining, caches, physical memory, virtual memory, I/O superscalar and out-of-order instruction execution, speculative execution, long (SIMD) and short (multimedia) vector execution, multithreading, and an introduction to shared memory multiprocessors. ### Prerequisites CIS 501 is a graduate-level course on computer architecture that assumes significant prior knowledge of computer organization and architecture. You should already be familiar with hardware caches, instruction execution pipelines, basic logic design, and some assembly-level programming. Students are expected to have had a course that covers the material in a textbook such as Patterson and Hennessy's "Computer Organization and Design: The Hardware/Software Interface". Penn's [CIS 371](http://www.cis.upenn.edu/~cis371/) is an example of such a course. If you do not have the appropriate background, you should either 1) not take this class or 2) spend significant time reviewing the textbook and lecture notes from [CIS 371](http://www.cis.upenn.edu/~cis371/). ### Course Materials There is *no required textbook* for this course. For additional review, students may find [Microprocessor Architecture: From Simple Pipelines to Chip Multiprocessors](http://www.cambridge.org/us/catalogue/catalogue.asp?isbn=9780521769921) by Jean-Loup Baer to be helpful. There is an electronic version of this book at [Cambridge Books Online](http://dx.doi.org/10.1017/CBO9780511811258) that up to 3 students can view at one time from the Penn network. If you have little undergraduate coursework in computer architecture you may also want to acquire a copy of Patterson and Hennessy's [Computer Organization and Design: The Hardware/Software Interface](http://textbooks.elsevier.com/web/product_details.aspx?isbn=9780123747501). The Penn Library provides unlimited access to [an online version of this book](http://hdl.library.upenn.edu/1017.12/876659). ### Grading Your grade in this course has the following components: + Paper Reviews: 5% + Homework: 35% + Midterm exam: 25% + Final exam: 35% There will be a **midterm exam** and a **final exam**. The final exam will be cumulative and will be held during the final time slot for the course. The final exam will also count as the PhD Architecture WPE I exam. There will be several **homework assignments**, consisting of problems to be worked out by hand and/or coding of simulations. Some of these assignments will be individual assignments, others will be group assignments. You are granted **one** 48-hour "grace" period for use on one individual homework assignment. Each group is granted **two** 48-hour grace periods for use on the group homework assignments. You can use at most one grace period per assignment. You don't need to email us asking to use a grace period; just turn the assignment in late and we will charge you for the use of a grace period accordingly. No assignment will be accepted more than 48 hours late. There is no grade penalty for using a grace period, nor any bonus for preserving your grace periods. Note also that *grace periods cannot be used for paper reviews*. There will be several **paper reviews** of academic papers from the computer architecture research literature. Before we discuss the paper in class, you will meet in groups to discuss the paper and write a concise response to a few high-level questions about the paper. To avoid the same groups for each paper, you may be in a group with a student at most once. If you would like a **regrade** of an assignment or exam, you must email me your request **within 1 week** from the date when grades are announced. ### Academic Misconduct Academic misconduct such as cheating will not be tolerated. The work you submit in this class is expected to be entirely your own. If you submit work that has in part or in whole been copied from some published or unpublished source (including current or former students), or that has been prepared by someone other than you, or that in any way misrepresents somebody else's work as your own, you will face severe discipline by the university. (Adapted from text appearing at the Office of Student Conduct page.) Any detected cases of cheating will be pursued. Penalties can include: receiving a zero on the assignment (the minimum penalty), failing the course, having a note placed in your permanent academic record, suspension, and ultimately expulsion. See Penn's [Code of Academic Integrity](https://provost.upenn.edu/policies/pennbook/2013/02/13/code-of-academic-integrity) for more information. ### Paper Reviews 1. [Cramming More Components onto Integrated Circuits](papers/mooreslaw-reprint.pdf) by Gordon Moore 2. [Producing Wrong Data Without Doing Anything Obviously Wrong!](papers/producing-wrong-data.pdf) by Todd Mytkowicz, Amer Diwan, Matthias Hauswirth and Peter F. Sweeney 3. [Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers](papers/jouppi-victim.pdf) by Norm Jouppi 4. [Cosmic Rays Don't Strike Twice: Understanding the Nature of DRAM Errors and the Implications for System Design](papers/dram-errors.pdf) by Andy Hwang, Ioan Stefanovici and Bianca Schroeder 5. [Memory Dependence Prediction using Store Sets](papers/store-sets.pdf) by George Chrysos and Joel Emer ### Important Links + The [trace file format](homework/trace-format.html) used in the homework assignments. Lecture slides: + [Introduction](slides/01_intro.pptx) [[pdf]](slides/01_intro.pdf) + [ISAs](slides/02_isa.pptx) [[pdf]](slides/02_isa.pdf) + [Transistors](slides/03_technology.pptx) [[pdf]](slides/03_technology.pdf) + [Performance](slides/04_performance.pptx) [[pdf]](slides/04_performance.pdf) + [Pipelining](slides/05_pipeline.pptx) [[pdf]](slides/05_pipeline.pdf) + [Caches](slides/06_caches.ppt) [[pdf]](slides/06_caches.pdf) + [Virtual Memory](slides/07_virtual_memory.pptx) [[pdf]](slides/07_virtual_memory.pdf) + [Superscalar](slides/08_superscalar.pptx) [[pdf]](slides/08_superscalar.pdf) + [Scheduling](slides/09_scheduling.pptx) [[pdf]](slides/09_scheduling.pdf) + [Multicore](slides/10_multicore.ppt) [[pdf]](slides/10_multicore.pdf) + [Vectors/GPUs](slides/11_vectors.pptx) [[pdf]](slides/11_vectors.pdf) + [Xbox1/PS4](slides/12_xbox.pptx) [[pdf]](slides/12_xbox.pdf) ### Course Schedule *This schedule is subject to change* Canvas also maintains [an iCal feed](https://upenn.instructure.com/feeds/calendars/user_uIuSzZjAPOAiVyZ4JXqBl4ZNchG6YXL984CY6azF.ics) with all of the assignment due dates. <iframe src="https://www.google.com/calendar/embed?src=devietti.net_i503ua86n8nu4ahv6q1il0r640%40group.calendar.google.com&ctz=America/New_York&amp;showTitle=0&amp;showPrint=0&amp;mode=AGENDA" style="border: 0" width="400" height="500" frameborder="0" scrolling="no"></iframe> <!-- <iframe src="https://www.google.com/calendar/embed?showTitle=0&amp;showPrint=0&amp;mode=AGENDA&amp;height=600&amp;wkst=1&amp;bgcolor=%23FFFFFF&amp;src=devietti.net_i503ua86n8nu4ahv6q1il0r640%40group.calendar.google.com&amp;color=%23182C57&amp;src=2aja0g41noikr4m8fl3q7adnverrld9j%40import.calendar.google.com&amp;color=%23A32929&amp;ctz=America%2FNew_York" style=" border-width:0 " width="600" height="600" frameborder="0" scrolling="no"></iframe> --> <!-- at end of semester, append: &amp;dates=20150827%2F20151215 --> ### <a name="exams"></a> Previous Exams + [Fall 2015 midterm](https://www.cis.upenn.edu/~cis501/exams/midterm15-fall.pdf), [solutions](https://www.cis.upenn.edu/~cis501/exams/midterm15-fall-solution.pdf) + [Spring 2015 midterm](https://www.cis.upenn.edu/~cis501/exams/midterm15.pdf), [solution+rubric](https://www.cis.upenn.edu/~cis501/exams/midterm15-rubric.pdf) + [Fall 2013 midterm with solutions](https://www.cis.upenn.edu/~cis501/exams/midterm13-solution.pdf) + [Fall 2012 midterm](https://www.cis.upenn.edu/~cis501/exams/midterm12.pdf), [solutions](https://www.cis.upenn.edu/~cis501/exams/midterm12-solution.pdf) + [Fall 2015 final](https://www.cis.upenn.edu/~cis501/exams/final15f.pdf), [solution+rubric](https://www.cis.upenn.edu/~cis501/exams/final15f-rubric.pdf) + [Spring 2015 final](https://www.cis.upenn.edu/~cis501/exams/final15.pdf), [solution+rubric](https://www.cis.upenn.edu/~cis501/exams/final15-rubric.pdf) + [Fall 2013 final with solutions](https://www.cis.upenn.edu/~cis501/exams/final13-rubric.pdf) + [Fall 2012 final](https://www.cis.upenn.edu/~cis501/exams/final12.pdf), [solutions](https://www.cis.upenn.edu/~cis501/exams/final12-solution.pdf) ### Previous Editions of CIS 501 - [Spring 2015](http://cis.upenn.edu/~cis501/previous/spring2015/) - [Fall 2013](http://cis.upenn.edu/~cis501/previous/fall2013/) - [Fall 2012](http://www.cis.upenn.edu/~milom/cis501-Fall12/)