<!-- <div class="alert alert-danger" role="alert"> <strong>If you are not registered for CIS 371 but would like to please join <a href="">the waitlist</a>.</strong> </div> --> <!-- <div class="alert alert-danger" role="alert"> <strong>Be sure to <a href="https://piazza.com/upenn/spring2018/srs_cis3710012018a">join the CIS 371 Piazza forum</a> so you don't miss important announcements!</strong> </div> --> ![Xilinx XC2064 die photo, c/o Xilinx](images/xc2064-die-photo.jpg "Xilinx XC2064 die photo, c/o Xilinx") <h2>CIS 371: Computer Organization and Design <small>Spring 2018</small></h2> ### Course Information **instructor**: [Joe Devietti](http://www.cis.upenn.edu/~devietti/) **when**: Tuesday/Thursday noon-1:30pm **where**: [Levine](https://www.facilities.upenn.edu/maps/locations/levine-hall-melvin-and-claire-weiss-tech-house) 101 **contact**: [**piazza**](piazza.com/upenn/spring2018/srs_cis3710012018a/home), [**canvas**](https://canvas.upenn.edu/courses/1391732) **TAs**: + Samantha Caby + Matthew Cohen + Vivian Ge + Jack Harkins + Benjamin Judd + Mauricio Mutai + Natasha Narang **office hours**: All office hours are held in the K Lab, Moore 200 + Monday 11:30am-1pm (Sammi, Vivian) + Monday 6-7:30pm (Matt, Natasha) + Monday 7:30-9pm (Jack) + Wednesday 11am-12:30pm (Matt, Sammi) + Thursday 1:30-4:30pm (Mauricio) + Thursday 3-4:30pm (Ben, Jack, Vivian) + Friday noon-1:30pm (Joe) + Saturday 1-2:30pm (Ben, Natasha) ### Course Description This is the second computer organization course and focuses on computer hardware design. In this course you will design and implement a pipelined, RISC-style processor using Verilog. You will learn the range of architectural techniques used in modern CPU design including superscalar design, out-of-order execution, and cache hierarchies. ### Prerequisites CIS 240 and knowledge of at least one software programming language. We do not assume you have any prior experience with Verilog. ### Course Materials The main textbook is *Computer Organization and Design: The Hardware/Software Interface* by Patterson and Hennessy. The 4th and 5th Editions are both fine. The 4th Edition is available [for free on-line through the Penn Library](http://hdl.library.upenn.edu/1017.12/876659). *Introduction to Logic Synthesis using Verilog HDL* by Reese and Thornton is also a nice introduction to hardware design and Verilog. It is also available [as a free PDF via the Penn Library](http://www.morganclaypool.com/doi/abs/10.2200/S00060ED1V01Y200610DCS006). [LC4 ISA sheet](lc4.html) ### Course Policies See details about [course policies on late days, collaboration, etc.](policies.html) ### Lecture slides Lecture recordings are available via Canvas under **Class Recordings**. Lecture slides: + Introduction ([pptx](slides/01_intro.pptx), [pdf](slides/01_intro.pdf)) + Hardware ([pptx](slides/02_hardware.pptx), [pdf](slides/02_hardware.pdf)) + Lab 1 ([pptx](slides/lab1.pptx), [pdf](slides/lab1.pdf)) + Arithmetic ([pptx](slides/03_arith.pptx), [pdf](slides/03_arith.pdf)) + Single-Cycle Datapath ([pptx](slides/04_singlecycle.pptx), [pdf](slides/04_singlecycle.pdf)) + Pipelined Datapath ([pptx](slides/05_pipeline.pptx), [pdf](slides/05_pipeline.pdf)) + Performance ([pptx](slides/06_performance.pptx), [pdf](slides/06_performance.pdf)) + Caches ([pptx](slides/07_caches.pptx), [pdf](slides/07_caches.pdf)) + Midterm Review ([pptx](slides/midterm_review.pptx), [pdf](slides/midterm_review.pdf)) + Superscalar ([pptx](slides/08_superscalar.pptx), [pdf](slides/08_superscalar.pdf)) + Out-of-Order ([pptx](slides/09_ooo.pptx), [pdf](slides/09_ooo.pdf)) + Virtual Memory ([pptx](slides/10_virtual_memory.pptx), [pdf](slides/10_virtual_memory.pdf)) + Meltdown/Spectre ([pptx](slides/meltdown_spectre.pptx), [pdf](slides/meltdown_spectre.pdf)) + Multicore ([pptx](slides/11_multicore.pptx), [pdf](slides/11_multicore.pdf)) ### Course Schedule The course schedule is maintained in Canvas. There is [an iCal feed](https://canvas.upenn.edu/feeds/calendars/user_uIuSzZjAPOAiVyZ4JXqBl4ZNchG6YXL984CY6azF.ics) you can subscribe to with all class events (class meeting times, office hours, review sessions, assignment due dates, etc.) ### Previous Editions of CIS 371 - [Spring 2017](http://www.cis.upenn.edu/~cis371/17sp/) - [Spring 2016](http://www.cis.upenn.edu/~cis371/16sp/) - [Spring 2015](http://www.cis.upenn.edu/~cis371/15sp/)