CIT 595:Digital Systems Organization and Design - Spring 2008

Last Modified on 4/25/2008

Meets: MW 1:30 - 3:00pm in Towne 321
F 3:00-4:00pm in Towne 321

Instructor: Diana Palsetia
Office: Moore/GRW 174
Office Hours: Wed & Thur 3-4pm or by Appointment
Email:

Teaching Assistant: Fatima Boujarwah
Office:GRW 72
Office Hours:Tue and Thur 12-1:30pm
Email:


Old Announcemnets

Date
Announcements
4/7/08
 Presentation Schedule (All reports due 4/28 in class. Please also submit soft copy to Blackboard.)
4/30/08
 Fatima's office hours: Thursday May 1st 12-3pm
My office hours: Friday May 2nd 1:30- 4pm

Lecture Notes

Day
Lecture Notes
Readings and Other Notes
1/16/08
 Administrative
Overview		 Chapter 1 (Null & Lobur) - Till your book arrives, read chapter 1 online
  • Overview, Components & Example (pg. 1 - 13 in book or pg. 1 - 10 in pdf)
  • Comp. Level Hierarchy & von Neumann Model (pg. 28 - 32 in book or pg. 25 - 29 in pdf)
1/21/08
 No lecture - MLK Day  
1/23/08
 Digital Logic and Boolean Alegbra Chp3: Introduction to Boolean Algebra and Logic Gates (pg. 109 - 120 in book )
           Karnaugh Maps (pg. 163 - 174 in book)
1/28/08
 Combinational Circuits Chapter 3- Section 3.5 (pg 123 - 131 in book)
1/30/08
 Sequential Circuits - Part I Chapter 3- Section 3.6.1 to 3.6.3 (pg 131 - 134), 3.6.5 (pg 140 -143)
2/4/08
 Sequential Circuits - Part II Chapter 3- Section 3.6.4 (pg 135 - 139), 3.6.6 (Just as an example)
Correction to slide 15
2/6/08
 Datapath
Additional (components breakdown)		 LC3 ISA
Chapter 3- Section 4.9 Instruction Processing Cycle
2/11/08
 Control 1- Hardwired
Instruction Tracing (ppt) 		 
2/13/08
 Control 2 - Microprogrammed LC3 Microprogrammed Implementation (only sections C.1 to C.4)
Chapter 4 - section 4.13 (explaination for different control given with different architecture)
2/18/08
 Computer Performance
Pipelining - Introduction 		Chpater 4 -Section 4.4, Chapter 11 - Section 11.2 - 11.4.3 (Performace)
Chapter 9 - Section 9.2 (RISC vs CISC)
Chapter 5 - Section 5.5 (Pipelining)
2/20/08
 Pipelinging - Hazards & Exceptions
Completed in Recitation 2/22/08 		Correction: The pipleine diagram should sign extend (sext) bits [8:0], diagrams are now corrected
Chapter 11 - Section 11.4.1 (Branch Optimization)
For Data Hazards the reference texts (listed in syllabus) provided more content
2/25/08
 Cache Chapter 6 - Section 6.1 - 6.4
2/27/08
 Cache contd.. Chapter 4 - Section 4.6 (Memory Interleaving)
Psuedo-Random Generator
3/3/08
 Review  
3/5/08
 Midterm Exam in class  
Spring Break 3/10 & 3/12  
3/17/08
 Discussed Midterm Exam
Virtual Memory 		Chapter 6 - Section 6.5
3/19/08
 Completed VM  
3/24/08
 Memory Alignment & Byte Ordering
OS 1 - Process Management & Scheduling 		Chapter 4 - Section 4.6 (Byte Addressibility and Alignment) (unaligned.c example)
Chapter 5 - 5.2.2 Little vs. Big Endian
Chapter 8 - Section 8.2.1 & 8.2.3
3/26/08
 OS 2 - Processes and Threads (slides updated) Processes: example
Threads: Pthreads Tutorial, example1 , example2
Handout on Deadlock Avoidance & Detection
3/31/08
 Continue with OS 2 lecture Casting int to void pointer example

4/3/08

 Disk Chaper 7 - Section 7.6.1
4/7/08
 OS3 - File System
Error Detection & Correction 		Chapter 7 - Section 7.6.2 (FAT) + Handout
Chapter 2 - Section 2.7.2 (Hamming Codes)
4/9/08
 Disk Performance Chapter 11 - Section 11.6 and Chapter 7 - Section 7.9 (RAID)
Perpendicular by Hitachi
4/14/08
 Guest Lecture by Pat Palmer link to Internet History & Standards
Chapter 12 - Section 12.3 (The roots and architecture of Internet)
More more information o n Internet you can read Chapter 12 further
4/16/08
 Programming Tools (lecture started Friday) Chapter 8 - Section 8.4.1 - 8.4.4
Linking and Loading
gcc linker options (broken link fixed)
4/18/08 - 4/25/08 Presentations
Student Project Link
4/28/08
 Review  
5/5/08
 Final Exam 9-11am Jon M. Huntsman Hall 355  
 

 

 

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