Two methods of specifying hardware are schematics and hardware description languages (HDLs).
What is an advantage of schematics over HDL?
Schematics "look" like hardware and are more intuitive to work with.
What is an advantage of HDL over schematics?
HDL "scales" better to larger designs.
Which method is used for "real-world" designs?
Real world designs (which are very large) are designed using HDL.
What does the first parameter of timescale Verilog directive specify?
It specifies the size of a programmatic timestep. If the value of the parameter is 1ns, then when you write #5 a 5ns delay is inserted.
What are programmatic variables in Verilog? What are they used for?
Programmatic variables are variables which aren't synthesized into hardware registers. They are used for testing.
Consider a module definition for a 2-to-1 single-bit mux: module mux_2to1 (o, s, a, b); output o; input s, a, b;
Write structural verilog for the body of this mux
wire nots, aNnots, bNs; not (nots, s); and (aNnots, a, nots); and (bNs, b, s); or (o, aNnots, bNs);
Write behavioral verilog for the body of this mux.
assign o = s ? b : a;
What is the difference between an FPGA and "real" hardware?
"Real" hardware is fabricated using a custom mask set. The layout of the transistors and wires themselves directly implement the design. The mask set of an FPGA doesn't implement specific design (other than the FPGA itself which without a "hardware program" does nothing.
What is an LUT? How is it used in an FPGA?
An LUT is a look-up-table, a smaller programmable RAM that is used to synthesize logical functions by implementing their truth tables.
What is a CLB?
A CLB is a combinational logic block and is the basic building block of an FPGA. A CLB typically contains one or more LUTs, one or more latches, and some programming logic.
What is an ASIC?
An ASIC is an Application-Specific Integrated Circuit, a direct hardware implementation of some high-level function of some application. Juxtapose that with a general-purpose processor and a software implementation of the same function.
What is "place and route"?
Place and route is the part of the design flow which takes a canonical functional representation (e.g., a "netlist") and implements it using the underlying technology (e.g., standard cells or FPGA).
What will you find on the website www.opencores.org?
Verilog or netlist descriptions of simple processors and processing components. These are free to use under GPL/BSD licenses.
How many LUTs does a 16-bit ripple carry adder take? Why?
32. Each full adder takes two LUTs, one for the sum function and one for the carry function.
How many LUTs does a 16-bit intrinsic adder take? Why?
16. Each full adder takes one LUT for the sum function. The carry functions are implemented using built-in "fast carry" logic.
What is the benefit of using seperate muxes to implement register bypass and register/immediate/pc select?
This allows you to seperate the bypass control (which is a function of the register names in the pipeline latches) from the datapath control (which are a function of the opcode of the instruction currently in the X stage).
In a traditional five-stage pipeline (FDXMW), which latches have to be overwritten with nops on a branch misprediction?
F/D and D/X.
What are hardware performance counters used for?
Performance counters are used to analyze the performance of programs, and to provide feedback and guidance for software and hardware optimization.