//`default_nettype none
  
// VERSION 1.1
   
/*
   * AR 1/23/09
   *
   * Simple harness for timer device.  Daughter-board interface.
	* inputs: 
	*    CLK_32MHz: systemACE clock
	*    WRITE_INTERVAL_BTN_IN: DIO4 BTN1
	*    READ_STATUS_BTN_IN: DIO4 BTN2
	*    TEST_BTN_IN: DIO4 BTN5
	* outputs:
	*    STATUS_LED_OUT: DIO4 LED1
	*	  TEST_LED_OUT: DIO4 LED8
	*	  LDGND: must be 1.
	*
	* specification:
	*    TEST_LED_OUT should be high when TEST_BTN_IN is high.  Translation, when you press BTN5, LED8 should go on.
	*    
	*    STATUS_LED_OUT should act like a three-second timer.  
	*    It should start out high.  Pressing WRITE_INTERVAL_BTN_IN (BTN1) initializes timer interval to 3 seconds. 
	*    After timer is initialized, whenever READ_STATUS_BTN_IN (BTN2) is pressed, LED should turn off for 3 seconds before
	*    turning back on, regardless of how many times READ_STATUS_BTN_IN is pressed in the meantime.
   */

module timer_harness(CLK_32MHz, 
		     WRITE_INTERVAL_BTN_IN,
		     READ_STATUS_BTN_IN,
		     STATUS_LED_OUT,
			  TEST_BTN_IN,
			  TEST_LED_OUT,
			  LDGND);

   input         CLK_32MHz;      // SystemACE clock
   input         WRITE_INTERVAL_BTN_IN;     // Down push button
   input         READ_STATUS_BTN_IN;  // left-most FPGA switch (3)
   output        STATUS_LED_OUT;

	input TEST_BTN_IN;
	output TEST_LED_OUT;
	output LDGND;
	
	assign LDGND = 1'b1;
	assign TEST_LED_OUT = TEST_BTN_IN;
	
   // timer
   timer_device timer(.write_interval(WRITE_INTERVAL_BTN_IN),
	   .interval_in(16'd3000), 
	   .read_status(READ_STATUS_BTN_IN),
	   .status_out(STATUS_LED_OUT),
	   .CLK(CLK_32MHz),
	   .GWE(1'b1),
	   .RST(1'b0));
endmodule