The journal and conference papers are copyrighted by ACM or IEEE (translation: you may not duplicate and/or distribute them for any commercial purpose). Please respect these copyrights.

Conference

HPCA'12	Flexible Register Management using Reference Counting. (pdf) Steven Battle, Andrew D. Hilton, Mark Hempstead and Amir Roth. 18th International Symposium on High-Performance Computer Architecture , Feb. 27-29, 2012.
HPCA'10	BOLT: Energy-Efficient Out-of-Order Latency-Tolerant Execution. (pdf) Andrew D. Hilton and Amir Roth. 16th International Symposium on High-Performance Computer Architecture , Jan. 12-14, 2010.
PACT'09	CPROB: Checkpoint Processing with Opportunistic Minimal Recovery. (pdf) Andrew D. Hilton, Neeraj Eswaran, and Amir Roth. 18th International Conference on Parallel Architectures and Compliation Techniques, Sep. 14-16, 2009.
ISCA'09	Decoupled Store Completion/Silent Deterministic Replay: Enabling Scalable Data Memory for CPR/CFP Processors. (pdf) Andrew Hilton and Amir Roth. 36th International Symposium on Computer Architecture, Jun. 20-24, 2009.
HPCA'09	iCFP: Tolerating All-Level Cache Misses in In-Order Processors. (pdf) Andrew Hilton, Santosh Nagarakatte and Amir Roth. 15th International Symposium on High-Performance Computer Architecture, Feb. 15-18, 2009.
ISCA'07	Ginger: Control Independence Using Tag Rewriting. (pdf) Andrew Hilton and Amir Roth. 34th International Symposium on Computer Architecture, Jun. 9-13, 2007.
MICRO'06	Serialization-Aware Mini-Graphs: Performance with Fewer Resources. (pdf) Anne Bracy and Amir Roth. 39th International Symposium on Microarchitecture, Dec. 9-13, 2006.
MICRO'06	NoSQ: Store-Load Forwarding without a Store Queue. (pdf) Tingting Sha, Milo M.K. Martin and Amir Roth. 39th International Symposium on Microarchitecture, Dec. 9-13, 2006.
MICRO'05	Scalable Store-Load Forwarding via Store Queue Index Prediction. (pdf) Tingting Sha, Milo M.K. Martin and Amir Roth. 38th International Symposium on Microarchitecture, Nov. 14-16, 2005.
ISCA'05	Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization. (pdf) Amir Roth. 32nd International Symposium on Computer Architecture, Jun. 6-8, 2005. Talk: (1-up pdf, 4-up pdf)
ISCA'05	Energy Aspects of Pre-Execution and Energy-Aware P-Thread Selection. (pdf) Vlad Petric and Amir Roth. 32nd International Symposium on Computer Architecture, Jun. 6-8, 2005.
ISCA'05	RENO: A Rename-Based Instruction Optimizer. (pdf) Vlad Petric, Tingting Sha, and Amir Roth. 32nd International Symposium on Computer Architecture, Jun. 6-8, 2005.
HPCA'05	Low-Overhead Interactive Debugging Using DISE. (pdf) Marc L. Corliss, E Christopher Lewis and Amir Roth. 11th International Symposium on High Performance Computer Architecture, Feb. 12-16, 2005.
MICRO'04	Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth. (pdf) Anne Bracy, Prashant Prahlad and Amir Roth. 37th International Symposium on Microarchitecture, Dec. 4-8, 2004.
LCTES'03	A DISE Implementation of Dynamic Code Decompression. (pdf) Marc L. Corliss, E Christopher Lewis and Amir Roth. 2003 Conference on Languages, Compilers, and Tools for Embedded Systems, Jun. 11-13, 2003.
ISCA'03	DISE: A Programmable Macro Engine for Customizing Applications. (pdf) Marc L. Corliss, E Christopher Lewis and Amir Roth. 30th International Symposium on Computer Architecture, Jun. 9-11, 2003. Talk: (1-up pdf, 4-up pdf)
MICRO'02	A Quantitative Framework for Automated Pre-Execution Thread Selection. (pdf) Amir Roth and Gurindar S. Sohi. 35th International Symposium on Microarchitecture, Nov. 20-22, 2002. Talk slides
MICRO'02	Three Extensions to Register Integration. (pdf) Vlad Petric, Anne Bracy, and Amir Roth. 35th International Symposium on Microarchitecture, Nov. 20-22, 2002. Talk slides (these were created on MACOS X, the fonts look bad on Windows)
HPCA'01	Speculative Data-Driven Multithreading. (pdf) Amir Roth and Gurindar S. Sohi. 7th International Symposium on High Performance Computer Architecture, Jan. 20-24, 2001. Talk slides
MICRO'00	Register Integration: A Simple and Efficient Implementation of Squash Reuse. (pdf) Amir Roth and Gurindar S. Sohi. 33rd International Symposium on Microarchitecture, Dec. 10-13, 2000. Talk slides
ICS'99	Improving Virtual Function Call Target Prediction via Dependence-Based Pre-Computation. (pdf) Amir Roth, Andreas Moshovos and Gurindar S. Sohi. 1999 International Conference on Supercomputing, Jun. 20-25, 1999.
ISCA'99	Effective Jump Pointer Prefetching for Linked Data Structures. (pdf) Amir Roth and Gurindar S. Sohi. 26th International Symposium on Computer Architecture, May 2-4, 1999.
ASPLOS'98	Dependence Based Prefetching for Linked Data Structures. (pdf) Amir Roth, Andreas Moshovos and Gurindar S. Sohi. 8th International Symposium on Architectural Support for Programming Languages and Operating Systems, Oct. 4-7, 1998.
MICRO'97	Exploiting Dead Value Information. (pdf) Milo M. Martin, Amir Roth, and Charles N. Fischer. 30th International Symposium on Microarchitecture, Dec. 1-3, 1997.

Journal

CAL'10	SMT-Directory: Efficient Load-Load Ordering for SMT.(pdf) Andrew Hilton and Amir Roth. IEEE Computer Architecture Letters, Vol. 12, 2010.
IEEE MICRO'10	iCFP: Tolerating All Level Cache Misses in In-Order Processors.(pdf) Andrew Hilton, Santosh Nagarakatte, and Amir Roth. IEEE MICRO, Vol. 30, No. 1, Jan./Feb., 2010.
CAL'08	Physical Register Reference Counting.(pdf) Amir Roth. IEEE Computer Architecture Letters, Vol. 10, 2008.
IEEE MICRO'07	NoSQ: Store-Load Communication without a Store Queue.(pdf) Tingting Sha, Milo M. K. Martin, and Amir Roth. IEEE MICRO, Vol. 27, No. 1, Jan./Feb., 2007.
JILP'06	Store Vulnerability Window (SVW): A Filter and Potential Replacement for Load Re-Execution.(pdf) Amir Roth. Journal of Instruction Level Parallelism, Vol. 8, 2006.
TECS'04	The Implementation and Evaluation of Dynamic Code Decompression Using DISE.(pdf) Marc L. Corliss, E Christopher Lewis and Amir Roth. ACM Transactions on Embedded Computer Systems, 2004.
JILP'02	Squash Reuse via a Simplified Implementation of Register Integration.(pdf) Amir Roth and Gurindar S. Sohi. Journal of Instruction Level Parallelism, Vol. 3, 2002.
Special Issue	Dynamic Methods for Load and Load-Dependent Scheduling. Amir Roth, Avi Mendelson, and Ronny Ronen. IEEE Special Issue on Microprocessor Architecture and Compiler Technology, Nov. 2001.
Computer'01	Speculative Multithreaded Processors. Gurindar S. Sohi and Amir Roth. IEEE Computer, Apr. 2001.

Workshop

MoBS'09	FIESTA: A Sample-Balanced Multi-Program Workload Methodology. (pdf) Andrew D. Hilton, Neeraj Eswaran, and Amir Roth. 5th Workshop on Modeling, Benchmarking, and Simulation, Jun. 21, 2009.
WASSA'04	Using DISE to Protect Return Addresses from Attack. (pdf) Marc L. Corliss, E Christopher Lewis, and Amir Roth. 2004 Workshop on Architectural Support for Security and Anti-Virus, Oct. 9, 2004.
MEDEA'00	Speculative Miss/Execute Decoupling. (pdf) Amir Roth, Craig B. Zilles, and Gurindar S. Sohi. 2000 Workshop on Memory Access Decoupling, Oct. 19, 2000.
IWIA'98	New Methods for Exploiting Program Structure and Behavior in Computer Architecture. (pdf) Amir Roth and Gurindar S. Sohi. 1998 Workshop on Innovative Architecture, Oct. 25-28, 1998.

Technical Reports (only if not published elsewhere)

PENN'08	Encoding Mini-Graphs with Handle-Prefix Outlining. (pdf) Anne Bracy and Amir Roth. CIS Technical Report MS-CIS-08-27, Aug. 2008.
PENN'04	A High-Bandwidth Load/Store Unit for Single- and Multi-Threaded Processors. (pdf) Amir Roth. CIS Technical Report MS-CIS-04-09, Jun. 2004.
PENN'03	A Static Profile Driven Approach to Energy-Efficient Register Integration. (pdf) Anne Bracy, Vlad Petric, and Amir Roth. CIS Technical Report MS-CIS-03-35, Dec. 2003.