Organized by Milo Martin and Amir Roth
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Presented by...
The Architecture and Compilers Group
Computer and Information Sciences Department
University of Pennsylvania
The traditional microprocessor architecture uses hardware techniques such as out-of-order processing to extract higher performance out of applications that have little or no explicit parallelism. The hardware techniques employed in the past have continued to improve performance, but at the cost of significantly increasing the power consumption of the traditional microprocessors. The power increases have led to not only higher electrical power delivery costs, but higher costs dissipating the power, resulting in high ambient noise, larger enclosure and hotter laps. To avoid a future that requires asbestos based jeans to properly handle laptops, the microprocessor architecture must change to facilitate higher performance without significantly higher power.
It is likely that microprocessor architecture will evolve from the ubiquitous single core, single threaded machine that we know and love, to an architecture that employs more cores and more threads. This shift is apparent in today's market where general purpose processors have included techniques such as Hyper-Threading Technology and Multi-Core processors. This talk will speculate on some potential next steps for that technology and some of the potential implications on software development.